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bioRxiv · 10.1101/2024.06.27.601038

Energy Aware Technology Mapping of Genetic Logic Circuits

Abstract

Energy and its dissipation are fundamental to all living systems, including cells. Insufficient abundance of energy carriers -as caused by the additional burden of artificial genetic circuits-shifts a cells priority to survival, also impairing the functionality of the genetic circuit. Moreover, recent works have shown the importance of energy expenditure in information transmission. Despite living organisms being non-equilibrium systems, non-equilibrium models capable of accounting for energy dissipation and non-equilibrium response curves are not yet employed in genetic design automation (GDA) software. To this end, we introduce Energy Aware Technology Mapping, the automated design of genetic logic circuits with respect to energy efficiency and functionality. The basis for this is an energy aware non-equilibrium steady state (NESS) model of gene expression, capturing characteristics like energy dissipation -which we link to the entropy production rate- and transcriptional bursting, relevant to eukaryotes as well as prokaryotes. Our evaluation shows that a genetic logic circuits functional performance and energy efficiency are disjoint optimization goals. For our benchmark, energy efficiency improves by 37.2% on average when comparing to functionally optimized variants. We discover a linear increase in energy expenditure and overall protein expression with the circuit size, where Energy Aware Technology Mapping allows for designing genetic logic circuits with the energy efficiency of circuits that are one to two gates smaller. Structural variants improve this further, while results show the Pareto dominance among structures of a single Boolean function. By incorporating energy demand into the design, Energy Aware Technology Mapping enables energy efficiency by design. This extends current GDA tools and complements approaches coping with burden in vivo. TOC Graphic O_FIG O_LINKSMALLFIG WIDTH=200 HEIGHT=110 SRC="FIGDIR/small/601038v2_ufig1.gif" ALT="Figure 1"> View larger version (23K): org.highwire.dtl.DTLVardef@77317borg.highwire.dtl.DTLVardef@151a140org.highwire.dtl.DTLVardef@318c19org.highwire.dtl.DTLVardef@e4be6f_HPS_FORMAT_FIGEXP M_FIG C_FIG

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BibTeXRIS

Kubaczka, E., Gehri, M., Marlhens, J. J. M., Schwarz, T., Molderings, M., Engelmann, N., Hochberger, C., Koeppl, H.. 2024-06-27. Energy Aware Technology Mapping of Genetic Logic Circuits. https://doi.org/10.1101/2024.06.27.601038

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