Fabrication and Modeling of Recessed Traces for Silicon-Based Neural Microelectrodes

Abstract

Chronically-implanted neural microelectrodes are powerful tools for neuroscience research and emerging clinical applications, but their usefulness is limited by their tendency to fail after months in vivo. One failure mode is the degradation of insulation materials that protect the conductive traces from the saline environment. Studies have shown that material degradation is accelerated by mechanical stresses, which tend to concentrate on raised topographies such as conducting traces. Therefore, to avoid raised topographies, we developed a fabrication technique that recesses (buries) the traces in dry-etched, self-aligned trenches. The depth of the trenches and the thickness of the traces are matched so that overlying insulation materials are flat, which, according to finite-element modeling, reduces stress concentrations in the insulation material. Here, we provide details on process optimization, modeling of intrinsic stress, and characterization using SEM, focused ion-beam cross sections, profilometry, and electrochemical impedance testing. The technique requires no extra masks, is easy to integrate with existing processes, and produces flatness within about 10 nm.