@misc{indiciae3b068cc1999c,
  title = {Optimization of heuristic logic synthesis by iteratively reducing circuit substructures using a database of optimal implementations},
  author = {Tran, A. P. and Jatkar, D. D. and Ali Al-Radhawi, M. and Ernst, E. A. and Sontag, E. D.},
  year = {2025},
  doi = {10.1101/2025.11.28.691216},
  url = {https://www.biorxiv.org/content/10.1101/2025.11.28.691216v1},
  note = {Source identifier: 10.1101/2025.11.28.691216}
}